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Comments On the Definitions of AOP
"The development of AOP was originated strictly for the purpose of describing and analyzing digital systems design." All the definitions of the paper, listed below, have theoretical meanings as well as a physical or practical meanings at the hardware level.
The star operation was presented as a mathematical definition, which operates on unary operators. However, it has a physical meaning when it operates on the priority-assignment of a prioritor.
The physical meaning to the "star operation" is "reversing or swapping the priority order in the priority-assignment of a prioritor". The reverse here mean "to flip, to swap, to transpose" the priority-assignment as if it is an
object in front of a plane mirror. A "Plane mirror" resembles the star operation exactly. If you put the "0123" priority-assignment in front of a plane mirror what you see is "3210" which is its star. The "costar" operation physically means "reversing the priorities of a priority assignment by a direct image operation" and that's the reason behind naming it a "costar" because its function is exactly as the star operation. The "uniform degeneracy" term came about in analogy to atoms states in physics. In physics, two states are said to be degenerate if there is appreciable overlap of their natural widths, or if other small effects disposition their energies about by amounts comparable to their separation. The uniform degeneracy of a prioritor, under AOP, is defined mathematically as the image of its priority assignment. Physically, what we are doing is dispositioning (repositioning) the logical values in the priority-assignment to have a new order of priorities. This process result
in a new prioritor that has a different function from the prioritor we just took its uniform degeneracy. Here we have the same parallel phenomena. Instead of "states" we have "priority-assignments". Instead of "dispositioning states" we are "dispositioning the order of priorities in the priority-assignment". Instead of "applying energy to
disposition the states", we are applying "a unary image operation to disposition the priorities". Thus, the name "degeneracy" is very meaningful. Comments On the Intrinsic and Extrinsic Theorems of AOP In this complementary information, I provided the physical interpretation at the hardware level of most of the theorems. They theorems are listed below:
Basic Properties Of Orthogonal Operators: This theorem shows the basic properties of the orthogonal operators. (was not listed in the paper.)
Comments On Del-Stars Theorem The Del operators corresponds to the MIN/MAX and AND/OR operators. A star operation on one of these Del operators reverses it priority assignment. Comments On Del-Del Images Theorem Because the Del operators are self-inverse operator, any image operation by using them corresponds to finding the priority of the expression under the image operation. Comments On Del-Inverse Theorem The inverse operation always means "priority". Since the Del operators are self-inverse, the priority of an expression is just its image under the Del operator. Comments On Sequential Inverse Theorem The practical meaning of the word "inverse" in AOP is "priority". This theorem states that the priority of a variable under the composite f¾
y priority-assignment is equal to the priority of (the priority of the variable under the 'y' priority-assignment) under the 'f' priority-assignment. This theorem is mainly used to break the priority of a composite priority assignment in terms of its composition. This theorem is used to prove the uniform image-scaling theorem. Comments On The Star-Image Theorem The physical meaning to the "star operation" is to "reverse or swap the priority order in the priority-assignment". The reverse here mean
to flip the priority-assignment as if it is an image in front of a plane mirror. "Plane mirror resembles the star operation exactly. If you put the number "0123" in front of a plane mirror what you see is "3210" which is its star. This theorem is very important at the hardware level. Its left side can not be implemented electronically on the other hand two electronic circuits can implement its right side. It simply states to reverse the priority order of the priority assignment take the image of the D
under the priority assignment itself. Comments On Sequential-Star Theorem: This theorem states that the reverse of the priority order of the composite f¾y
priority-assignment is equivalent to the reverse of the 'f' priority-assignment under the image of the 'y' priority assignment. Comments On Costar Self-inverse Theorem The result of the costar operation is always a self-inverse operator. This means that the resulted operator can invert data and can retrieve the inverted data by itself. This property is heavily used at the hardware level when implementing digital circuits. For example, in the binary system to build up a simple flip-flop we pick two AND operators and two inverters (NOT). In MVL we pick two MINs and two MV-NOT operators. How do we do the same
in AOP? Since AOP is a multi-operation algebra, we have many prioritors to pick from. The simplest way is to pick a STAS system and then pick two a's and two unary operators equal to the
costar of a (a#). This
property forces the digital network to satisfy the ABSORPTION THEOREM-I and acts as a storage (LATCH) element. Comments On Costar-Star Theorem This theorem is similar to the star-image theorem (Theorem 5.2.5) in its action. This theorem states that priority-assignment can be reversed by taking the image of the priority-assignment by its costar. This costar property forces the digital LATCH network to satisfy the ABSORPTION
THEOREM-I and acts as a storage element. Comments On Properties Of *, # Operations The "costar" physically means "reversing the priorities of the priority-assignment by a direct image operation" and that is the reason behind naming it a "costar" because its function is exactly as the star operation. The first part states that the mechanism of
reversing the order of priorities for a prioritor is the same for its star. The second part states that reversing the priorities and then finding a "reversing operator" is not the same finding the star of the priority-assignment and then taking the star of the its costar operator. Comments On Comparison Theorem:
Comments On Star-Relative Priority Theorem If the priority of 'A' under a is less than or equal to the priority of 'B' under a,
then the priority of 'A' under a* is greater than or equal to the priority of 'B' under the a*
or vice versa. If the priority of 'A' under a is greater than or equal to the priority of 'B' under a,
then the priority of 'A' under a* is less than or equal to the priority of 'B' under the a*
or vice versa. Comments On The Costar Relative Priority Theorem if the priority of 'A' under a is less than or equal to the priority of 'B' under a,
then the priority of 'A' under a# is greater than or equal to the priority of 'B' under the a#
or vice versa. if the priority of 'A' under a is greater than or equal to the priority of 'B' under a,
then the priority of 'A' under a# is less than or equal to the priority of 'B' under the a#
or vice versa. Comments On The Mean Theorem: If we implement part (1) at the hardware level, we get a comparator circuit which passes all values of 'A' which are greater than or equal to half the system radix. Also, if we implement part (2) at
the hardware level, we get a comparator circuit that passes all values of 'A' which are less than or equal to half the system radix. If the radix is high and the 'A' is a digitized sine signal then these circuits will act as a "digital-diode". From this theorem we can derive the Boolean complementary laws A+A¾=1
and A*A¾=0. Since Ñ=OR
and D=NOT then A+A¾³½
since only one digit exist in the binary system that is greater than '½' which is one. Thus A+A¾=1.
Since D=AND and D=NOT then
A*A¾£½
since only one digit exist in the binary system that is less than '½' which is zero. Thus A*A¾=0. Comments On The Generalized-Mean Theorem: When the part (1) is implemented at the hardware level it generates a comparator circuit that passes all values of 'A' which are greater than or equal to half the system radix. Also, when
part (2) is implemented at the hardware level it generates a comparator circuit which passes all values of 'A' which are less than or equal to half the system radix. If the radix is high and the 'A' is a digitized sine signal then these circuits will act as a "digital-diode". This theorem is a generalized theorem to the Mean theorem using a
and a#. Comments On The star Theorem The reverse of the priority assignment twice gives us the same priority assignment. The star of a prioritor is always a prioritor. Therefore, in all the STAS priority rules we can exchange a
by a* and a* by a. Comments On Infimum-Digit theorem This theorem states that the infimum-signal of a prioritor is equal to the digital signal that has the '0' priority. In digital systems, we have a controlled flow of data. This control process allows us to stop the flow or start the flow and is done by "digital gates". Prioritors, at the hardware level,
are gates which open and close by digital signals. The infimum-digit at the hardware level means "infimum signal". This signal, due to its inferiority, will not be acknowledged by its prioritor causing the prioritor to keep acknowledging all other signals to pass through its gate. Example-5.3.2.1: On Infimum Digit In the quinary system, from Table-1, the prioritor a=Q7
has an infimum digit of 3 and a priority-assignment of 4S1023. Using infimum-digit, a¾V=
0¾a=0¾4S1023=3.
In the binary system, the AND has a priority-assignment of 2S01 and an infimum digit of ‘1’. Using theorem-4 , a¾V=
0¾a=0¾2S01=1. Comments On Supremum-Digit Theorem This theorem states that the infimum-signal of a prioritor is equal to the digital signal that has the '0' priority. In digital systems, we have a controlled flow of data. This control process allows us to stop the flow or start the flow and is done by "digital gates". Prioritors, at the hardware level, are gates that open and close by digital signals. The supremum-digit at the hardware level is
called the "supremum signal". This signal, due to its superiority, will always be acknowledged first by its prioritor and cause the prioritor to ignore all other signals. Example: On Supremum Digit In the quinary system, from Table-1, the prioritor a=Q7
has a supremum digit of 1 and a priority-assignment of 4S1023. Using supremum-digit, a¾L=
(z-1)¾a=3¾4S1023=1.
In the binary system, the AND has a priority-assignment of 2S01 and a supremum digit of ‘0’. Using the supremum-digit theorem, a¾L=
(z-1)¾a=1¾2S01
=0. Comments On Inferiority Theorem This theorem states that the infimum-signal of a prioritor, denoted by a¾V
, will pass data. In digital systems, we have a controlled flow of data. This control process allows us to stop the flow or start the flow and is done by "digital gates". Prioritors, at the hardware level, are gates that open and close by digital signals. The infimum-digit at the hardware level is
called the "infimum signal". This signal, due to its superiority, will always be acknowledged first by its prioritor and cause the prioritor to ignore all other signals. Comments On Superiority Theorem This theorem states that the supremum-signal of a prioritor, denoted by a¾L
, will block data flow out of its prioritor. In digital systems, we have a controlled flow of data. This control process allows us to stop the flow or start the flow and is done by "digital gates". Prioritors, at the hardware level, are gates that open and close by digital signals. The supremum-digit at the hardware level is
called the "supremum signal". This signal, due to its superiority, will always be acknowledged first by its prioritor and cause the prioritor to ignore all other signals. Comments On Idempotence Theorem If the two inputs are tied for prioritor, then it has no functional effect but rather delays the input signal 'A'. Comments On Commutation Theorem This theorem states that switching the input signals of a prioritor will not change its operation result. Comments On Association Theorem The order of the input digital signals to a prioritor does not change the prioritor output. This property enables the
cascading of two-input prioritors to get any n-input prioritor. Comments on Distribution Theorem By this theorem we can reduce a digital circuit equivalent to the right side with two identical prioritors and their star-prioritor by a digital circuit equivalent to the left side which uses one
prioritor and its star-prioritor. Comments On Absorption Theorem-I Its left side represent a digital circuit with two prioritors and the right side represent 'A’ the input variable. Also, it can be used to minimize
digital circuits and it enables the design of a digital storage element. Comments On Absorption Theorem-II A circuit can replace the three prioritors digital circuit represented by its left side with one prioritor as in its right side. It can be used in digital circuit minimization. Comments On Absorption Theorem-III A circuit can replace the three prioritors digital circuit represented by its left side with one prioritor as in its right side. It can be used in digital circuit minimization. Comments On Star-Cyclic Theorem The signal with the highest priority under a prioritor has the least priority under its star and The signal with the least priority under a prioritor has the highest priority under its star. Costar-Cyclic Theorem Operation This theorem is used when we work with prioritors and converters. The Star-cyclic theorem is used when we work with a prioritor and its
star prioritor. Comments On Theorem 5.3.15 Static Theorem This theorem can be used in circuit minimization. Comments On Quasi Static Theorem This theorem can be used in circuit minimization. Comments On Substitution Theorem This theorem states that instead of detecting (z-1) signals just detect the remaining signal and flips the orthogonal operator states. Comments On The Representations Of MVL Functions In AOP Comments On The Orthogonal Theorem-I & II Figure-1 shows the function table of Example 7.3 (page 26) and the relations between the orthogonal theorems expressions and the functions table. In physical terms, the orthogonal theorems resemble a RAM. The Xm or Xs is the address name of the memory location. 'S' is the index of that memory location in the decimal system. Xm or Xs
is the address of the memory location in the z-radix system. Since this memory has 'n' data lines, then it has Zn memory locations. 'Xsn ' is the value of the n-th digit in the memory address, 'Xs2' the value of the 2nd digit in the memory address, 'Xsj'
is the value of the jth digit in the memory address. In order to access a memory content, we select its address that is decoded by the memory decoder. In terms of mathematics, a vector Xm whose components are the MVL function variables represents the address of the memory. The memory decoder is represented by the internal expression of each theory which is "Õ
Xsj __DXmj
a¾Lf(Xm) " for the orthogonal theorem-II and "f(Xm)aÕ
Xsj __DXmj
a¾La¾V"for the orthogonal theorem-I. Thus, the orthogonal operators
and the a prioritor correspond to the memory decoder. The content of the memory, mathematically, is represented by f(Xm)
in each theorem. The function table of a MVL function lists the variables values in a row followed by the function value. The variables values listed in a row correspond to the Xm vector in the orthogonal
theorems. Where the first variable-value from right corresponds to the Xm1 component, and the second value corresponds to the Xm2 component, and the jth value from right corresponds to the Xmj
component, and the last value (first from left) corresponds to the Xmn component. The 'm' index corresponds to the serial number of the function value as listed in the table. Table-1 shows how the function table of Example-7.3 was transformed into the orthogonal theorem-I. Column-5 shows the term type that results from the function value. Entries 2,4,5,6, and 8 result in a trivial term because the function value is equal to the supremum of the T3 prioritor which was selected based
on MRV=1 and NMRV=2. The 'Xm' column lists the Xm vectors for each entry in the table. Xm2 and Xm3 are the vector components that correspond to the 'u' and 'v' variables. Table-2 shows how the function table of Example-7.3 was transformed into the orthogonal theorem-II. Column-5 shows the term type that results from the function value. Entries 2,4,5,6, and 8 result in a trivial term because the function value is equal to the supremum of the T3 prioritor
which was selected based on MRV=1 and NMRV=2. The 'Xm' column lists the Xm vectors for each entry in the table. Xm2 and Xm1 are the vector components that correspond to the 'u' and 'v' variables Figure-2 shows the physical implementation of the orthogonal theorem-I. This circuit actually
represents a data selector. A specific 'x' will select a specific data out of the 'z' data lines labeled '0', '1',...'z-1'. We detect data address by an (n+1) input prioritor and 'n' orthogonal operators. Each orthogonal operator detects a single 'digit' in the address of the data. If at least one digit is not right, it switches the orthogonal operator to the supremum-state
of the 'a' which appears at the output of the a
prioritor (superiority theorem) and at the inputs of the 'a*' prioritor. This supremum signal will not affect the a*
prioritor because it is an infimum signal to the a* prioritor (Star-cyclic theorem). If all the x's are matches the address programmed by the orthogonal operators,
then all the orthogonal operators switch to the infimum-state causing the data at the 'n+1' terminal of the prioritor to pass through it (inferiority theorem) to the a*
prioritor. At this point, all the signals that reach the a* are infimum except for the signal coming from the detected address. Thus this signal has a higher
priority than the infimum-signal and will be acknowledged by the a* prioritor to pass to the outside word. Figure-3 is the same as Figure-2 except, instead of using an extra terminal to the data at the n-input of the a
prioritor, we program the data with its address by the orthogonal operators. If the address matches the programmed address by the orthogonal operators, then they switch to the function value at that address otherwise, they switch to the supremum-state of the a
prioritor. This process requires 'n' terminals instead of 'n+1' terminals. This process is similar to the PLAs structure and operation. Examples Example 7.2: On Orthogonal Theorem-II: Let f(A,B)=AbB
in the quaternary system where b=Q8=4S1032=4S3310:3210:1111:0010.
From the function table of this function the MRV is '1' because it is repeated seven times and NMRV=5. Thus the a prioritor is
selected so that a¾L=1
(which is one of these Q7,Q8,Q9,QA,QB,or QC
see Table-1) and a¾V=0. Example 7.3: On Orthogonal Theorem-II: Let f(A,B)=AµB where µ=QO=MAX= 4S3333:3222:3211:3210. Even
though MRV=3 and NMRV=2. Assume we want to select this function a=QK. The a*=(4S3021)*=4S1203=Q9, Thus the
start-off representation (not least) based on the orthogonal Theorem-II is
If we apply the substitution theorem on the last three terms we obtain:
QUESTIONS AND ANSWERS
Comments On The Expansions Of MVL Functions In AOP The Expansion Theorem-I&II The understanding of the orthogonal theorems will lead to the understanding of the expansion theorems. The expansion theorems are very important in the minimization process of priority equations. For example, the substitution theorem is a special case of the expansion
theorems. This can be seen from its proof.
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